CY7C346-35RMB

CY7C346-35RMB is a Cypress MAX erasable programmable logic device (EPLD), not a memory IC. It contains 128 macrocells arranged in eight logic array blocks, with 20 dedicated inputs and up to 64 bidirectional I/O pins. Its EPROM-based programmable logic supports legacy control and logic-consolidation designs.

What does -35RMB identify? Cypress's ordering table lists this exact code as the 35 ns version in R100, a 100-pin windowed ceramic pin grid array, for the military operating range. CY7C346-35JC, -35NC and -35RMB do not have the same package. A shared CY7C346 prefix is not sufficient to approve a replacement.

Is an unprogrammed device ready to replace a failed board component? Not necessarily. The replacement must carry the required logic configuration. Before ordering, confirm whether the offered parts are blank, erased or programmed; identify the approved programming file and programmer support; and inspect the window, pins and full top marking. A speed-grade number does not describe every internal timing path, so check the timing paths used by the design.

For an RFQ, specify CY7C346-35RMB, quantity, required programming state, accepted date-code range and documentation requirements. Ask for lot-specific photos and any available screening records. A ceramic package or military-temperature ordering code alone does not establish the condition or qualification history of the offered lot.

Technical reference checked October 24, 2026: Cypress CY7C346 datasheet, document 38-03005 Rev. *B, April 19, 2004; device architecture and ordering table, especially page 17. The former hosted PDF link no longer serves the datasheet, so no substitute-part download is provided.