Industry certifications and quality credentials
CY7C346-35RMB Cypress Semiconductor CPGA integrated circuit
Part Number

CY7C346-35RMB

Cypress Semiconductor CPGA FPGA
Available Stock
190 pcs
Manufacturer
Cypress Semiconductor
Package
CPGA
Category
FPGA
Stock
190 pcs
Date Code
1844
Datasheet
Open PDF

Overview

CY7C346-35RMB is a Cypress 128-macrocell MAX erasable programmable logic device (EPLD). The Cypress datasheet divides the 128 macrocells into eight logic array blocks, with 20 dedicated inputs, up to 64 bidirectional I/O pins and 256 shared expander product terms. The CY7C346 uses 0.8 µm double-metal CMOS EPROM technology. For the exact -35RMB ordering code, the ordering table specifies a 35 ns speed grade and the R100 100-pin windowed ceramic pin grid array in the military operating range.

The military range is -55°C to +125°C case temperature with a 5 V ±10% supply. ZZX Electronics lists 190 pcs with date code 1844. Because this is a UV-erasable legacy programmable device, procurement should verify programmed versus erased state, window condition, original marking, lot/date-code evidence, handling history and the required screening flow instead of inferring qualification from the ceramic package alone. Send an RFQ for current lot photos, traceability and inspection options.

Additional Information

Part NumberCY7C346-35RMB
PackageCPGA
CategoryFPGA
Available Stock190 pcs
Date Code1844

Technical Specifications

Attribute Value
Product Type UV-erasable MAX EPLD
Macrocells 128
Logic Array Blocks 8
Macrocells per LAB 16
Expander Product Terms 256
Dedicated Inputs 20
Bidirectional I/O Up to 64
Speed Grade 35 ns
Technology 0.8 µm double-metal CMOS EPROM
Supply Voltage 5 V ±10% (military range)
Operating Temperature -55°C to +125°C case
Package R100, 100-pin windowed ceramic pin grid array
Mounting Type Through Hole

Datasheet

Download the current available datasheet for CY7C346-35RMB.

Download Datasheet

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